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Silicon photonic chip designed to break through the bottleneck structure
   Edit:管理员   Browse:599  Date:2016-03-04 

Today's silicon photonic chip must use the complex manufacturing process to connect the light source and the chip, but also with the wafer level stack are inseparable. However, scientists at the University of Munich TUM () in Technical, Germany, recently announced that they have successfully grown vertically on the chip with a diameter of 360nm. This opens a new optical port for the integration of photonic components on the CMOS circuit.
Due to the variety of materials with a different lattice parameters and different thermal expansion coefficient, in silicon grown III-V semiconductors often leads to strain and produces a large number of defects, makes these stratification does not apply to build available equipment.
Technical University of Munich research team first of all alone in the diameter of 40-50nm space on the chip deposited gallium gallium gallium (GaAs) nanowires, in line with the 250nm silicon dioxide (SiO2) staggered layer in the seed hole diameter. And then, by controlling the lateral growth of GaAs nanowires, the diameter of the inner core of the inner core of the 10um is extended by molecular beam epitaxy (MBE) and the length of the inner core of the inner core to the coaxial laser structure.

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